Old `Better than Human' Hall Of Fame

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Latest results will be found in the New `Better than Human' Hall Of Fame.

All circuits listed below perform full on-line self-diagnosis of single stuck-at faults. This means that their error output (E) will go high as soon as their other outputs are incorrect due to a hardware fault. In terms of the fitness measures they have all fitnesses equal to 1 except parsimony. Hand designed circuits are mentioned in the table for comparing the size of their Built-In Self-Test (BIST) overhead to that of the evolved circuits. Smaller circuits will lead to reduced power, reduced silicon area and higher fault tolerance. All this would result in large cost cuts for mass produced circuits.

Some results were achieved by only evolving BIST functionality ontop of a fixed (Locked) hand designed circuit. These circuits retain the exact specifications of the original circuit while also performing self-diagnosis.

All circuits are Combinational unless specified as Sequential. All circuits diagnose Single Faults unless specified as Multiple Faults in which case they `Test the Tester'. For more information on these terms read this. Some Multiple Fault detecting BIST circuits signal normal behaviour by keeping their E output oscillating and signal an error when this oscillation stops. These will be refered to as `Oscillating signal'. Others use two E outputs and will be refered to as `Dual-rail signal'.

Task Name (click for diagram) Discovered BIST Gate Overhead Comments
Edge Triggered D-Latch.[Hand Designed] 6 
Edge Triggered D-LatchVazquez IApr 20036Voter with unequal copies 
Edge Triggered D-LatchBond IApr 20036Not Robust 
Two bit Multiplier (7 gates).[Hand Designed] 14 
Two bit Multiplier (7 gates)Bond IIAug 20039 
Two bit Multiplier (7 gates)BabbageAug 20039 
Benchmark C17 (6 gates).[Hand Designed] 9 
Benchmark C17 (6 gates)DharkenJul 20038 
Locked Benchmark C17 (6 gates).[Hand Designed] 9 
Locked Benchmark C17 (6 gates)TexelJul 20039 
Locked Benchmark B1 (6 gates).[Hand Designed] 13 
Locked Benchmark B1 (6 gates)DPC INov -00016 
Benchmark B1 (6 gates).[Hand Designed] 13 
Benchmark B1 (6 gates)eDoozlefloppyAug 20035 
Benchmark B1 (6 gates)HENMANIACAug 20034 
Locked Benchmark CM42 (18 gates).[Hand Designed] 37 
Locked Benchmark CM42 (18 gates)The Blue OneFeb 200413 
Benchmark CM42 (18 gates).[Hand Designed] 37 
Benchmark CM42 (18 gates)Rave IAug 200312Only minor modifications to hand designed module 
Locked Benchmark DECOD (26 gates).[Hand Designed] 57 
Locked Benchmark DECOD (26 gates)Kroslid IIAug 200326 
Locked Benchmark DECOD (26 gates)Skratz 3d.Aug 200321 
Benchmark DECOD (26 gates).[Hand Designed] 57 
Benchmark DECOD (26 gates)bwhite2Aug 200317 
Locked Benchmark CM138 (16 gates).[Hand Designed] 31 
Locked Benchmark CM138 (16 gates)BembelAug 200311 
Benchmark CM138A (16 gates).[Hand Designed] 31 
Benchmark CM138A (16 gates)ImotephAug 200310 
Locked Sequential Benchmark DK27 (5 four-input LUTs, 3 latches).[Hand Designed] 9 
Locked Sequential Benchmark DK27 (5 four-input LUTs, 3 latches)CONSEQUENTJan 20047 
Sequential Benchmark: DK27 (5 four-input LUTs, 3 latches).[Hand Designed] 9 
Sequential Benchmark: DK27 (5 four-input LUTs, 3 latches)ElizabethJan 20045 
Locked Sequential Benchmark: MC (8 four-input LUTs, 2 D-latches).[Hand Designed] 13 
Locked Sequential Benchmark: MC (8 four-input LUTs, 2 D-latches)OryxJan 20048 
Sequential Benchmark: MC (8 four-input LUTs, 2 D-latches).[Hand Designed] 13 
Sequential Benchmark: MC (8 four-input LUTs, 2 D-latches)SMILODONJan 20045 
Full adder (2 four-input LUTs) under multiple faults.[Hand Designed]  
Full adder (2 four-input LUTs) under multiple faultsFree-DCFeb 20042Oscillating signal. Detects any number of multiple faults. 
Full adder (5 gates) under multiple faults (Ass. A).[Hand Designed] 15 
Full adder (5 gates) under multiple faults (Ass. A)TwoPlusTwoFeb 20044Oscillating signal, Assumption A 
Benchmark C17 (6 gates) under multiple faults (Ass. A).[Hand Designed] 20 
Benchmark C17 (6 gates) under multiple faults (Ass. A)KuduFeb 20049Oscillating signal, Assumption A 
Benchmark C17 (6 gates) under multiple faults (Ass. A, Dual Rail).[Hand Designed] 20 
Benchmark C17 (6 gates) under multiple faults (Ass. A, Dual Rail)piFeb 20048Dual rail signal, Assumption A 
Locked Sequential Benchmark BEECOUNT (9 four-input LUTs, 2 latches).[Hand Designed] 14 
Locked Sequential Benchmark BEECOUNT (9 four-input LUTs, 2 latches)AlmutFeb 200410 
Sequential Benchmark BEECOUNT (9 four-input LUTs, 2 latches).[Hand Designed] 14 
Sequential Benchmark BEECOUNT (9 four-input LUTs, 2 latches)EschwegeFeb 20047 
Sequential Benchmark BEECOUNT (9 four-input LUTs, 2 latches)Macka IFeb 20045 
Locked Sequential Benchmark: DK27 (20 gates, 3 latches).[Hand Designed] 24 
Locked Sequential Benchmark: DK27 (20 gates, 3 latches)DHEPFeb 200419 
Benchmark C17 (2 four-input LUTs) under multiple faults (Osc.).[Hand Designed]  
Benchmark C17 (2 four-input LUTs) under multiple faults (Osc.)OlvidioMar 20047Oscillating signal. Detects up to 2 simultaneous faults.